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IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
INDUSTRIAL TEMPERATURE RANGE
CS
I17
Chip Selection.
A logic low level on this pin enables the Serial Control Interface.
CI
I19
Serial Control Interface Data Input.
Control data input pin. CCLK determines the data rate.
CO
O20
Serial Control Interface Data Output (Tri-State).
Control data output pin. CCLK determines the data rate.
CCLK
I18
Serial Control Interface Clock.
This is the clock for the Serial Control Interface. It can be up to 8.192 MHz.
MCLK
I22
Master Clock Input.
This pin provides the clock for the DSP of the IDT821054. The frequency of the MCLK can be 1.536 MHz,
1.544 MHz, 2.048 MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or 8.192 MHz.
RESET
I23
Reset Input.
Forces the device to default mode. Active low.
INT12
O34
Interrupt Output Pin for Channel 1-2.
Active high interrupt signal for Channel 1 and 2, open-drain. It reflects the changes on the corresponding
SLIC input pins.
INT34
O15
Interrupt Output Pin for Channel 3-4.
Active high interrupt signal for Channel 3 and 4, open-drain. It reflects the changes on the corresponding
SLIC input pins.
CHCLK1
O33
Chopper Clock Output One.
Provides a programmable output signal (2 -28 ms) synchronous to MCLK.
CHCLK2
O16
Chopper Clock Output Two.
Provides a programmable output signal (256 kHz, 512 kHz or 16.384 MHz) synchronous to MCLK.
Name
Type
Pin Number
Description
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